Advanced Settings for BT848/BT878 based cards. The default values are chosen
to work well with most situations and usually do not need to be changed.
Setting |
Default |
Description |
Agc Disable |
0
|
Disable AGC(automatic gain control). This doesn't work well
for almost anyone, but it's there. |
Crush |
1
|
Turn on Adaptive AGC , this is the Crush bit in the ADC
Interface register. |
White Crush Up |
207
|
Fine tuning of the Adaptive AGC White Crush Up Register.
This, and below, are the full 8 bit contents of the 2 registers.
I'm not sure we have the best defaults here. See the BT8x8
datasheets. |
White Crush Down |
127
|
Fine tuning of the Adaptive AGC White Crush Down Registers.
See above. |
Even Chroma AGC |
1
|
Even/odd chroma AGC. Must be 0 or 1. Turns on color AGC. |
Odd Chroma AGC |
1
|
|
Even Luma Peak |
0 |
From the BT8X8datasheet: (PEAK) bit determines whether the
normal luma low-pass filters are implemented via the HFILT bits,
or the peaking filters are implemented. (HFILT is the horizontal
filter mentioned below) |
Odd Luma Peak |
0 |
|
Full Luma Range |
1 |
Luma Output Range. DScaler defaults to 1 but maybe should be
set to 0 for NTSC systems. |
Even Luma Dec |
0 |
From the datasheet: The Luma Decimation filter is used to
reduce the high-frequency component of the luma signal. Useful
when scaling to CIF resolutions or lower. If ON it enables luma
decimation using the selectable H filter. |
Odd Luma Dec |
0
|
|
Even Comb |
1 |
Chroma Comb Enable. This bit determines if the chroma comb is
included in
the data path. If enabled, a full line store is used to average
adjacent lines of
color information, reducing cross-color artifacts. |
Odd Comb |
1 |
|
Color Bars |
0 |
Show color bars on display |
Gamma Correction |
0 |
Gamma Correction. This is another double negative. If it
equals 0 (OFF) it really says we do not want to do gamma
correction removal. If ON the we DO gamma correction removal. This setting
doesn't appear to affect the YUY2 mode that we use and so has no effect. |
Coring |
0 |
Luma Coring. This sets the minimum black level. This value
might also be different for PAL/NTSC. It must be 0, 1, 2, or 3.
Unclear yet what is the best value. |
Horz Filter |
0 |
Turns on hardware Horizontal filter. Because of DScalers
large scale only values 0 and 1 are valid. 0=normal 2 tap filter
(like before), 4 adds a little more filter but works (I think)
only when the BtLumaPeak and BtLumaDec are also both on. It makes
thing a little softer.
|
Vert Filter |
0 |
Vertical filter. Valid values would be 0-7 but at DScaler's
resolution only 0 and 4 are allowed. 0 = 2-tap interpolation
only. 4 = 2-tap plus z filter. This make thing a lot softer. |
Color Kill |
1 |
Auto Low Color Killer is supposed to suppress the color
signal if it looks like a black and white video. |
Custom Pixel Width |
750 |
Pixel Width used when Custom Pixel Width is selected on the menu. |
Horizontal Delay |
0 |
Number of half lines to skip at the top before we start capturing. 0 means use default
for format. |
Vertical Delay |
0 |
Period to skip on the left before we start capturing. 0 means use default
for format. |
The following settings are available only when using the
CWCEC Atlas board. The defaults vary depending on the current video format.
|
Horizontal Offset |
0 |
Number of pixels to skip on the left edge when DMAing SPI data to memory.
Used to center the image in the display window.
|
Vertical Offset |
0 |
Number of lines to skip at the top when DMAing SPI data to memory.
Used to center the image in the display window.
|
Is Video Progressive |
off |
When checked, input video is progressive (non-interlaced) format.
When unchecked, input video is standard interlace format. This is
normally automatically set true (on) when capturing RGB/DVI or Hi-Res
video, and false (off) otherwise.
|
AD9882 PLL (Width) |
800 |
PLL divisor. Can be used fine tune the image width when using the AD9882
for video capture.
|
AD9882 VCO |
1 |
Selects VCO frequency range.
|
AD9882 Pump |
1 |
Varies the current that drives the PLL loop filter.
|
AD9882 Phase |
0 |
ADC clock pahse adjustment.
|
AD9882 Pre-Coast |
0 |
Number of Hsync periods that coast goes active prior to Vsync.
|
AD9882 Post-Coast |
0 |
Number of Hsync periods before coast goes inactive following Vsync.
|
AD9882 Hsync PW (Pos) |
32 |
Sets the number of pixel clocks that HSOUT will remain active. Can
be used to fine tune the horizontal position of the image.
|
AD9882 Sync Sep Thresh |
32 |
Sets how many pixel clocks to count before toggling high or low.
This should be set to some number greater than the maximum Hsync or
equalization pulsewidth.
|
AD9882 SOG Threshold |
15 |
Sets the voltage level of the Sync-on-Green slicer's comparator.
|
AD9882 Sync-On-Green |
off |
Force Hsync and Vsync to come from the green input.
|
AD9882 Coast Enabled |
on |
When checked, coasting with internally generated coast signal. When
not checked, coast is disabled.
|
AD9882 Coast Override |
off |
When checked, coast polarity is set by the Active High Coast Polarity
setting. When unchecked, coast polarity determined automatically by
the chip.
|
AD9882 Active High Coast Polarity |
on |
When checked, input coast polarity is active high. When unchecked,
coast polarity is active low.
|