; Listing generated by Microsoft (R) Optimizing Compiler Version 15.00.21022.08 

	TITLE	c:\Develop\DScaler423a\DScaler\CPU.cpp
	.686P
	.XMM
	include listing.inc
	.model	flat

INCLUDELIB OLDNAMES

PUBLIC	?CpuFeatureFlags@@3IA				; CpuFeatureFlags
PUBLIC	??_C@_0N@GFHLKNJN@UnknownVendr?$AA@		; `string'
PUBLIC	??_C@_0N@FFJGBINN@AuthenticAMD?$AA@		; `string'
PUBLIC	??_C@_0N@BDDFKIGD@GenuineIntel?$AA@		; `string'
?CpuFeatureFlags@@3IA DD 01H DUP (?)			; CpuFeatureFlags
;	COMDAT ??_C@_0N@BDDFKIGD@GenuineIntel?$AA@
CONST	SEGMENT
??_C@_0N@BDDFKIGD@GenuineIntel?$AA@ DB 'GenuineIntel', 00H ; `string'
CONST	ENDS
;	COMDAT ??_C@_0N@FFJGBINN@AuthenticAMD?$AA@
CONST	SEGMENT
??_C@_0N@FFJGBINN@AuthenticAMD?$AA@ DB 'AuthenticAMD', 00H ; `string'
CONST	ENDS
;	COMDAT ??_C@_0N@GFHLKNJN@UnknownVendr?$AA@
CONST	SEGMENT
??_C@_0N@GFHLKNJN@UnknownVendr?$AA@ DB 'UnknownVendr', 00H ; `string'
PUBLIC	__$ArrayPad$
PUBLIC	?CPU_SetupFeatureFlag@@YAXXZ			; CPU_SetupFeatureFlag
EXTRN	__except_handler4:PROC
;	COMDAT xdata$x
; File c:\develop\dscaler423a\dscaler\cpu.cpp
xdata$x	SEGMENT
__sehtable$?CPU_SetupFeatureFlag@@YAXXZ DD 0ffffffe4H
	DD	00H
	DD	0ffffffa0H
	DD	00H
	DD	0fffffffeH
	DD	FLAT:$LN5@CPU_SetupF
	DD	FLAT:$LN6@CPU_SetupF
; Function compile flags: /Odtp
xdata$x	ENDS
;	COMDAT ?CPU_SetupFeatureFlag@@YAXXZ
_TEXT	SEGMENT
_signature$ = -80					; size = 4
_vendorIntel$ = -76					; size = 13
_vendor$ = -60						; size = 13
_vendorAMD$ = -44					; size = 13
__$ArrayPad$ = -28					; size = 4
__$SEHRec$ = -24					; size = 24
?CPU_SetupFeatureFlag@@YAXXZ PROC			; CPU_SetupFeatureFlag, COMDAT

; 71   : {

  00000	55		 push	 ebp
  00001	8b ec		 mov	 ebp, esp
  00003	6a fe		 push	 -2			; fffffffeH
  00005	68 00 00 00 00	 push	 OFFSET __sehtable$?CPU_SetupFeatureFlag@@YAXXZ
  0000a	68 00 00 00 00	 push	 OFFSET __except_handler4
  0000f	64 a1 00 00 00
	00		 mov	 eax, DWORD PTR fs:0
  00015	50		 push	 eax
  00016	83 c4 c0	 add	 esp, -64		; ffffffc0H
  00019	a1 00 00 00 00	 mov	 eax, DWORD PTR ___security_cookie
  0001e	31 45 f8	 xor	 DWORD PTR __$SEHRec$[ebp+16], eax
  00021	33 c5		 xor	 eax, ebp
  00023	89 45 e4	 mov	 DWORD PTR __$ArrayPad$[ebp], eax
  00026	53		 push	 ebx
  00027	56		 push	 esi
  00028	57		 push	 edi
  00029	50		 push	 eax
  0002a	8d 45 f0	 lea	 eax, DWORD PTR __$SEHRec$[ebp+8]
  0002d	64 a3 00 00 00
	00		 mov	 DWORD PTR fs:0, eax
  00033	89 65 e8	 mov	 DWORD PTR __$SEHRec$[ebp], esp

; 72   : #ifndef _M_AMD64
; 73   :    UINT signature = 0;

  00036	c7 45 b0 00 00
	00 00		 mov	 DWORD PTR _signature$[ebp], 0

; 74   :    char vendor[13]        = "UnknownVendr";  // Needs to be exactly 12 chars

  0003d	a1 00 00 00 00	 mov	 eax, DWORD PTR ??_C@_0N@GFHLKNJN@UnknownVendr?$AA@
  00042	89 45 c4	 mov	 DWORD PTR _vendor$[ebp], eax
  00045	8b 0d 04 00 00
	00		 mov	 ecx, DWORD PTR ??_C@_0N@GFHLKNJN@UnknownVendr?$AA@+4
  0004b	89 4d c8	 mov	 DWORD PTR _vendor$[ebp+4], ecx
  0004e	8b 15 08 00 00
	00		 mov	 edx, DWORD PTR ??_C@_0N@GFHLKNJN@UnknownVendr?$AA@+8
  00054	89 55 cc	 mov	 DWORD PTR _vendor$[ebp+8], edx
  00057	a0 0c 00 00 00	 mov	 al, BYTE PTR ??_C@_0N@GFHLKNJN@UnknownVendr?$AA@+12
  0005c	88 45 d0	 mov	 BYTE PTR _vendor$[ebp+12], al

; 75   : 
; 76   :    // Define known vendor strings here
; 77   : 
; 78   :    char vendorAMD[13]     = "AuthenticAMD";  // Needs to be exactly 12 chars

  0005f	8b 0d 00 00 00
	00		 mov	 ecx, DWORD PTR ??_C@_0N@FFJGBINN@AuthenticAMD?$AA@
  00065	89 4d d4	 mov	 DWORD PTR _vendorAMD$[ebp], ecx
  00068	8b 15 04 00 00
	00		 mov	 edx, DWORD PTR ??_C@_0N@FFJGBINN@AuthenticAMD?$AA@+4
  0006e	89 55 d8	 mov	 DWORD PTR _vendorAMD$[ebp+4], edx
  00071	a1 08 00 00 00	 mov	 eax, DWORD PTR ??_C@_0N@FFJGBINN@AuthenticAMD?$AA@+8
  00076	89 45 dc	 mov	 DWORD PTR _vendorAMD$[ebp+8], eax
  00079	8a 0d 0c 00 00
	00		 mov	 cl, BYTE PTR ??_C@_0N@FFJGBINN@AuthenticAMD?$AA@+12
  0007f	88 4d e0	 mov	 BYTE PTR _vendorAMD$[ebp+12], cl

; 79   :    char vendorIntel[13]   = "GenuineIntel";  // Needs to be exactly 12 chars

  00082	8b 15 00 00 00
	00		 mov	 edx, DWORD PTR ??_C@_0N@BDDFKIGD@GenuineIntel?$AA@
  00088	89 55 b4	 mov	 DWORD PTR _vendorIntel$[ebp], edx
  0008b	a1 04 00 00 00	 mov	 eax, DWORD PTR ??_C@_0N@BDDFKIGD@GenuineIntel?$AA@+4
  00090	89 45 b8	 mov	 DWORD PTR _vendorIntel$[ebp+4], eax
  00093	8b 0d 08 00 00
	00		 mov	 ecx, DWORD PTR ??_C@_0N@BDDFKIGD@GenuineIntel?$AA@+8
  00099	89 4d bc	 mov	 DWORD PTR _vendorIntel$[ebp+8], ecx
  0009c	8a 15 0c 00 00
	00		 mov	 dl, BYTE PTR ??_C@_0N@BDDFKIGD@GenuineIntel?$AA@+12
  000a2	88 55 c0	 mov	 BYTE PTR _vendorIntel$[ebp+12], dl

; 80   : 
; 81   :    // Step 1: Check if processor has CPUID support. Processor faults
; 82   :    // with an illegal instruction exception if the instruction is not
; 83   :    // supported. This step catches the exception and immediately returns
; 84   :    // with feature tstring bits with all 0s, if the exception occurs.
; 85   :     __try

  000a5	c7 45 fc 00 00
	00 00		 mov	 DWORD PTR __$SEHRec$[ebp+20], 0

; 86   :     {
; 87   :         __asm xor    eax, eax

  000ac	33 c0		 xor	 eax, eax

; 88   :         __asm xor    ebx, ebx

  000ae	33 db		 xor	 ebx, ebx

; 89   :         __asm xor    ecx, ecx

  000b0	33 c9		 xor	 ecx, ecx

; 90   :         __asm xor    edx, edx

  000b2	33 d2		 xor	 edx, edx

; 91   :         __asm cpuid

  000b4	0f a2		 cpuid

; 92   :     }

  000b6	c7 45 fc fe ff
	ff ff		 mov	 DWORD PTR __$SEHRec$[ebp+20], -2 ; fffffffeH
  000bd	eb 1c		 jmp	 SHORT $LN8@CPU_SetupF
$LN5@CPU_SetupF:
$LN10@CPU_SetupF:

; 93   :     __except (EXCEPTION_EXECUTE_HANDLER)

  000bf	b8 01 00 00 00	 mov	 eax, 1
$LN7@CPU_SetupF:
$LN9@CPU_SetupF:
  000c4	c3		 ret	 0
$LN6@CPU_SetupF:
  000c5	8b 65 e8	 mov	 esp, DWORD PTR __$SEHRec$[ebp]

; 94   :     {
; 95   :         return;

  000c8	c7 45 fc fe ff
	ff ff		 mov	 DWORD PTR __$SEHRec$[ebp+20], -2 ; fffffffeH
  000cf	e9 64 01 00 00	 jmp	 $LN4@CPU_SetupF

; 96   :     }

  000d4	c7 45 fc fe ff
	ff ff		 mov	 DWORD PTR __$SEHRec$[ebp+20], -2 ; fffffffeH
$LN8@CPU_SetupF:

; 97   : 
; 98   :     CpuFeatureFlags |= FEATURE_CPUID;

  000db	a1 00 00 00 00	 mov	 eax, DWORD PTR ?CpuFeatureFlags@@3IA ; CpuFeatureFlags
  000e0	83 c8 01	 or	 eax, 1
  000e3	a3 00 00 00 00	 mov	 DWORD PTR ?CpuFeatureFlags@@3IA, eax ; CpuFeatureFlags

; 99   : 
; 100  :     _asm
; 101  :     {
; 102  :          // Step 2: Check if CPUID supports function 1 (signature/std features)
; 103  :          xor     eax, eax                      // CPUID function #0

  000e8	33 c0		 xor	 eax, eax

; 104  :          cpuid                                 // largest std func/vendor tstring

  000ea	0f a2		 cpuid

; 105  :          mov     dword ptr [vendor], ebx       // save

  000ec	89 5d c4	 mov	 DWORD PTR _vendor$[ebp], ebx

; 106  :          mov     dword ptr [vendor+4], edx     //  vendor

  000ef	89 55 c8	 mov	 DWORD PTR _vendor$[ebp+4], edx

; 107  :          mov     dword ptr [vendor+8], ecx     //   tstring

  000f2	89 4d cc	 mov	 DWORD PTR _vendor$[ebp+8], ecx

; 108  :          test    eax, eax                      // largest standard function==0?

  000f5	85 c0		 test	 eax, eax

; 109  :          jz      $no_standard_features         // yes, no standard features func

  000f7	0f 84 3b 01 00
	00		 je	 $$no_standard_features$139405

; 110  :          or      [CpuFeatureFlags], FEATURE_STD_FEATURES// does have standard features

  000fd	83 0d 00 00 00
	00 02		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, 2 ; CpuFeatureFlags

; 111  : 
; 112  :          // Step 3: Get standard feature flags and signature
; 113  :          mov     eax, 1                        // CPUID function #1

  00104	b8 01 00 00 00	 mov	 eax, 1

; 114  :          cpuid                                 // get signature/std feature flgs

  00109	0f a2		 cpuid

; 115  :          mov     [signature], eax              // save processor signature

  0010b	89 45 b0	 mov	 DWORD PTR _signature$[ebp], eax

; 116  : 
; 117  :          // Step 4: Extract desired features from standard feature flags
; 118  :          // Check for time stamp counter support
; 119  :          mov     ecx, CPUID_STD_TSC            // bit 4 indicates TSC support

  0010e	b9 10 00 00 00	 mov	 ecx, 16			; 00000010H

; 120  :          and     ecx, edx                      // supports TSC ? CPUID_STD_TSC:0

  00113	23 ca		 and	 ecx, edx

; 121  :          neg     ecx                           // supports TSC ? CY : NC

  00115	f7 d9		 neg	 ecx

; 122  :          sbb     ecx, ecx                      // supports TSC ? 0xffffffff:0

  00117	1b c9		 sbb	 ecx, ecx

; 123  :          and     ecx, FEATURE_TSC              // supports TSC ? FEATURE_TSC:0

  00119	83 e1 10	 and	 ecx, 16			; 00000010H

; 124  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  0011c	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 125  : 
; 126  :          // Check for MMX support
; 127  :          mov     ecx, CPUID_STD_MMX            // bit 23 indicates MMX support

  00122	b9 00 00 80 00	 mov	 ecx, 8388608		; 00800000H

; 128  :          and     ecx, edx                      // supports MMX ? CPUID_STD_MMX:0

  00127	23 ca		 and	 ecx, edx

; 129  :          neg     ecx                           // supports MMX ? CY : NC

  00129	f7 d9		 neg	 ecx

; 130  :          sbb     ecx, ecx                      // supports MMX ? 0xffffffff:0

  0012b	1b c9		 sbb	 ecx, ecx

; 131  :          and     ecx, FEATURE_MMX              // supports MMX ? FEATURE_MMX:0

  0012d	83 e1 20	 and	 ecx, 32			; 00000020H

; 132  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  00130	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 133  : 
; 134  :          // Check for CMOV support
; 135  :          mov     ecx, CPUID_STD_CMOV           // bit 15 indicates CMOV support

  00136	b9 00 80 00 00	 mov	 ecx, 32768		; 00008000H

; 136  :          and     ecx, edx                      // supports CMOV?CPUID_STD_CMOV:0

  0013b	23 ca		 and	 ecx, edx

; 137  :          neg     ecx                           // supports CMOV ? CY : NC

  0013d	f7 d9		 neg	 ecx

; 138  :          sbb     ecx, ecx                      // supports CMOV ? 0xffffffff:0

  0013f	1b c9		 sbb	 ecx, ecx

; 139  :          and     ecx, FEATURE_CMOV             // supports CMOV ? FEATURE_CMOV:0

  00141	83 e1 40	 and	 ecx, 64			; 00000040H

; 140  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  00144	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 141  : 
; 142  :          // Check support for P6-style MTRRs
; 143  :          mov     ecx, CPUID_STD_MTRR           // bit 12 indicates MTRR support

  0014a	b9 00 10 00 00	 mov	 ecx, 4096		; 00001000H

; 144  :          and     ecx, edx                      // supports MTRR?CPUID_STD_MTRR:0

  0014f	23 ca		 and	 ecx, edx

; 145  :          neg     ecx                           // supports MTRR ? CY : NC

  00151	f7 d9		 neg	 ecx

; 146  :          sbb     ecx, ecx                      // supports MTRR ? 0xffffffff:0

  00153	1b c9		 sbb	 ecx, ecx

; 147  :          and     ecx, FEATURE_P6_MTRR          // supports MTRR ? FEATURE_MTRR:0

  00155	81 e1 00 10 00
	00		 and	 ecx, 4096		; 00001000H

; 148  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  0015b	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 149  : 
; 150  :          // Check for initial SSE support. There can still be partial SSE
; 151  :          // support. Step 9 will check for partial support.
; 152  :          mov     ecx, CPUID_STD_SSE            // bit 25 indicates SSE support

  00161	b9 00 00 00 02	 mov	 ecx, 33554432		; 02000000H

; 153  :          and     ecx, edx                      // supports SSE ? CPUID_STD_SSE:0

  00166	23 ca		 and	 ecx, edx

; 154  :          neg     ecx                           // supports SSE ? CY : NC

  00168	f7 d9		 neg	 ecx

; 155  :          sbb     ecx, ecx                      // supports SSE ? 0xffffffff:0

  0016a	1b c9		 sbb	 ecx, ecx

; 156  :          and     ecx, (FEATURE_MMXEXT+FEATURE_SSEFP+FEATURE_SSE) // supports SSE ?

  0016c	81 e1 00 26 00
	00		 and	 ecx, 9728		; 00002600H

; 157  :                                                // FEATURE_MMXEXT+FEATURE_SSEFP:0
; 158  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  00172	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 159  : 
; 160  :          // Check for SSE2 support. (TRB - Was not part of sample code)
; 161  :          mov     ecx, CPUID_STD_SSE2            // bit 26 indicates SSE2 support

  00178	b9 00 00 00 04	 mov	 ecx, 67108864		; 04000000H

; 162  :          and     ecx, edx                      // supports SSE2 ? CPUID_STD_SSE2:0

  0017d	23 ca		 and	 ecx, edx

; 163  :          neg     ecx                           // supports SSE2 ? CY : NC

  0017f	f7 d9		 neg	 ecx

; 164  :          sbb     ecx, ecx                      // supports SSE2 ? 0xffffffff:0

  00181	1b c9		 sbb	 ecx, ecx

; 165  :          and     ecx, (FEATURE_SSE2)           // supports SSE2 ?

  00183	81 e1 00 40 00
	00		 and	 ecx, 16384		; 00004000H

; 166  :                                                // FEATURE_SSE2:0
; 167  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  00189	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 168  : 
; 169  :          // Step 5: Check for CPUID extended functions
; 170  :          mov     eax, 0x80000000               // extended function 0x80000000

  0018f	b8 00 00 00 80	 mov	 eax, -2147483648	; 80000000H

; 171  :          cpuid                                 // largest extended function

  00194	0f a2		 cpuid

; 172  :          cmp     eax, 0x80000000               // no function > 0x80000000 ?

  00196	3d 00 00 00 80	 cmp	 eax, -2147483648	; 80000000H

; 173  :          jbe     $no_extended_features         // yes, no extended feature flags

  0019b	0f 86 97 00 00
	00		 jbe	 $$no_extended_features$139406

; 174  :          or      [CpuFeatureFlags], FEATURE_EXT_FEATURES// does have ext. feature flags

  001a1	83 0d 00 00 00
	00 04		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, 4 ; CpuFeatureFlags

; 175  : 
; 176  :          // Step 6: Get extended feature flags
; 177  :          mov     eax, 0x80000001               // CPUID ext. function 0x80000001

  001a8	b8 01 00 00 80	 mov	 eax, -2147483647	; 80000001H

; 178  :          cpuid                                 // EDX = extended feature flags

  001ad	0f a2		 cpuid

; 179  : 
; 180  :          // Step 7: Extract vendor independent features from extended flags
; 181  :          // Check for 3DNow! support (vendor independent)
; 182  :          mov     ecx, CPUID_EXT_3DNOW          // bit 31 indicates 3DNow! supprt

  001af	b9 00 00 00 80	 mov	 ecx, -2147483648	; 80000000H

; 183  :          and     ecx, edx                      // supp 3DNow! ?CPUID_EXT_3DNOW:0

  001b4	23 ca		 and	 ecx, edx

; 184  :          neg     ecx                           // supports 3DNow! ? CY : NC

  001b6	f7 d9		 neg	 ecx

; 185  :          sbb     ecx, ecx                      // supports 3DNow! ? 0xffffffff:0

  001b8	1b c9		 sbb	 ecx, ecx

; 186  :          and     ecx, FEATURE_3DNOW            // support 3DNow!?FEATURE_3DNOW:0

  001ba	81 e1 80 00 00
	00		 and	 ecx, 128		; 00000080H

; 187  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  001c0	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 188  : 
; 189  :          // Step 8: Determine CPU vendor
; 190  :          lea     esi, vendorAMD                // AMD's vendor tstring

  001c6	8d 75 d4	 lea	 esi, DWORD PTR _vendorAMD$[ebp]

; 191  :          lea     edi, vendor                   // this CPU's vendor tstring

  001c9	8d 7d c4	 lea	 edi, DWORD PTR _vendor$[ebp]

; 192  :          mov     ecx, 12                       // strings are 12 characters

  001cc	b9 0c 00 00 00	 mov	 ecx, 12			; 0000000cH

; 193  :          cld                                   // compare lowest to highest

  001d1	fc		 cld

; 194  :          repe    cmpsb                         // current vendor str == AMD's ?

  001d2	f3 a6		 rep	  cmpsb

; 195  :          jnz     $not_AMD                      // no, CPU vendor is not AMD

  001d4	75 62		 jne	 SHORT $$not_AMD$139407

; 196  : 
; 197  :          // Step 9: Check AMD specific extended features
; 198  :          mov     ecx, CPUID_EXT_AMD_3DNOWEXT   // bit 30 indicates 3DNow! ext.

  001d6	b9 00 00 00 40	 mov	 ecx, 1073741824		; 40000000H

; 199  :          and     ecx, edx                      // 3DNow! ext?

  001db	23 ca		 and	 ecx, edx

; 200  :          neg     ecx                           // 3DNow! ext ? CY : NC

  001dd	f7 d9		 neg	 ecx

; 201  :          sbb     ecx, ecx                      // 3DNow! ext ? 0xffffffff : 0

  001df	1b c9		 sbb	 ecx, ecx

; 202  :          and     ecx, FEATURE_3DNOWEXT         // 3DNow! ext?FEATURE_3DNOWEXT:0

  001e1	81 e1 00 01 00
	00		 and	 ecx, 256		; 00000100H

; 203  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  001e7	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 204  : 
; 205  :          test    [CpuFeatureFlags], FEATURE_MMXEXT      // determined SSE MMX support?

  001ed	f7 05 00 00 00
	00 00 02 00 00	 test	 DWORD PTR ?CpuFeatureFlags@@3IA, 512 ; CpuFeatureFlags, 00000200H

; 206  :          jnz     $has_mmxext                   // yes, don't need to check again

  001f7	75 17		 jne	 SHORT $$has_mmxext$139408

; 207  : 
; 208  :          // Check support for AMD's multimedia instruction set additions
; 209  : 
; 210  :          mov     ecx, CPUID_EXT_AMD_MMXEXT     // bit 22 indicates MMX extension

  001f9	b9 00 00 40 00	 mov	 ecx, 4194304		; 00400000H

; 211  :          and     ecx, edx                      // MMX ext?CPUID_EXT_AMD_MMXEXT:0

  001fe	23 ca		 and	 ecx, edx

; 212  :          neg     ecx                           // MMX ext? CY : NC

  00200	f7 d9		 neg	 ecx

; 213  :          sbb     ecx, ecx                      // MMX ext? 0xffffffff : 0

  00202	1b c9		 sbb	 ecx, ecx

; 214  :          and     ecx, FEATURE_MMXEXT           // MMX ext ? FEATURE_MMXEXT:0

  00204	81 e1 00 02 00
	00		 and	 ecx, 512		; 00000200H

; 215  :          or      [CpuFeatureFlags], ecx                 // merge into feature flags

  0020a	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags
$$has_mmxext$139408:

; 216  : 
; 217  : $has_mmxext:
; 218  : 
; 219  :          // Step 10: Check AMD-specific features not reported by CPUID
; 220  :          // Check support for AMD-K6 processor-style MTRRs
; 221  :          mov     eax, [signature]   // get processor signature

  00210	8b 45 b0	 mov	 eax, DWORD PTR _signature$[ebp]

; 222  :          and     eax, 0xFFF         // extract family/model/stepping

  00213	25 ff 0f 00 00	 and	 eax, 4095		; 00000fffH

; 223  :          cmp     eax, 0x588         // CPU < AMD-K6-2/CXT ? CY : NC

  00218	3d 88 05 00 00	 cmp	 eax, 1416		; 00000588H

; 224  :          sbb     edx, edx       // CPU < AMD-K6-2/CXT ? 0xffffffff:0

  0021d	1b d2		 sbb	 edx, edx

; 225  :          not     edx            // CPU < AMD-K6-2/CXT ? 0:0xffffffff

  0021f	f7 d2		 not	 edx

; 226  :          cmp     eax, 0x600         // CPU < AMD Athlon ? CY : NC

  00221	3d 00 06 00 00	 cmp	 eax, 1536		; 00000600H

; 227  :          sbb     ecx, ecx       // CPU < AMD-K6 ? 0xffffffff:0

  00226	1b c9		 sbb	 ecx, ecx

; 228  :          and     ecx, edx       // (CPU>=AMD-K6-2/CXT)&&

  00228	23 ca		 and	 ecx, edx

; 229  :                     // (CPU<AMD Athlon) ? 0xffffffff:0
; 230  :          and     ecx, FEATURE_K6_MTRR   // (CPU>=AMD-K6-2/CXT)&&

  0022a	81 e1 00 08 00
	00		 and	 ecx, 2048		; 00000800H

; 231  :                     // (CPU<AMD Athlon) ? FEATURE_K6_MTRR:0
; 232  :          or      [CpuFeatureFlags], ecx         // merge into feature flags

  00230	09 0d 00 00 00
	00		 or	 DWORD PTR ?CpuFeatureFlags@@3IA, ecx ; CpuFeatureFlags

; 233  : 
; 234  :          jmp     $all_done      // desired features determined

  00236	eb 00		 jmp	 SHORT $$all_done$139409
$$not_AMD$139407:
$$no_extended_features$139406:
$$no_standard_features$139405:
$$all_done$139409:
$LN4@CPU_SetupF:

; 235  : 
; 236  : $not_AMD:
; 237  :          // Extract features specific to non AMD CPUs (except SSE2 already done)
; 238  : $no_extended_features:
; 239  : $no_standard_features:
; 240  : $all_done:
; 241  :    }
; 242  : #endif
; 243  : }

  00238	8b 4d f0	 mov	 ecx, DWORD PTR __$SEHRec$[ebp+8]
  0023b	64 89 0d 00 00
	00 00		 mov	 DWORD PTR fs:0, ecx
  00242	59		 pop	 ecx
  00243	5f		 pop	 edi
  00244	5e		 pop	 esi
  00245	5b		 pop	 ebx
  00246	8b 4d e4	 mov	 ecx, DWORD PTR __$ArrayPad$[ebp]
  00249	33 cd		 xor	 ecx, ebp
  0024b	e8 00 00 00 00	 call	 @__security_check_cookie@4
  00250	8b e5		 mov	 esp, ebp
  00252	5d		 pop	 ebp
  00253	c3		 ret	 0
?CPU_SetupFeatureFlag@@YAXXZ ENDP			; CPU_SetupFeatureFlag
END
